[Solved] Mips instruction single cycle datapath

by


out needs to be a reg type to be assigned in an always block.

  • IEEE Std 1364-1995 and above

    output [31:0] out;
reg [31:0] out;

  • IEEE Std 1364-2001 and above (recommenced)

    output reg [31:0] out;

Other problem, i0 through 3 are in in the sensitivity list of your always block. This infers complex latching logic.

  • IEEE Std 1364-1995 and above

    always @(s0 or i0 or i1 or i2 or i3)

  • IEEE Std 1364-2001 and above (recommenced)

    always @* // or @(*)

solved Mips instruction single cycle datapath