you need to create a top module which would encapsulate both, dut and testbench. I guess under the testbench you meant a bfm model for your dut. You will need also to create a testbench module which will provide stimulus and compare the resulting behavior somehow.
module top();
// declare all your inputs needed to instantiate both models and tb
// i.e.
logic clk, in, out_dut, out_bfm;
// instantiate your dut
dut dut(clk, in, out_dut);
// instantiate your bfm
bfm bfm(clk, in , out_bfm);
// instantiate your test bench module
tb tb(clk, in, out_dut, out_bfm);
endmodule
tb would provide ‘in’ to both, and get ‘outs’ from both. you can compare the results in the testbench.
and yes, you would also have to generate all clocks needed.
Of course this is just a top level schema for what has to be done. You need to consult your coding methodology guide for how to organize it and write test benches and duts.
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solved Instanciate the same device under test twice [closed]