{"id":20052,"date":"2022-11-08T14:36:29","date_gmt":"2022-11-08T09:06:29","guid":{"rendered":"https:\/\/jassweb.com\/solved\/solved-what-is-the-most-efficient-way-to-zero-all-bits-below-the-most-significant-set-bit\/"},"modified":"2022-11-08T14:36:29","modified_gmt":"2022-11-08T09:06:29","slug":"solved-what-is-the-most-efficient-way-to-zero-all-bits-below-the-most-significant-set-bit","status":"publish","type":"post","link":"https:\/\/jassweb.com\/solved\/solved-what-is-the-most-efficient-way-to-zero-all-bits-below-the-most-significant-set-bit\/","title":{"rendered":"[Solved] What is the most efficient way to zero all bits below the most significant set bit?"},"content":{"rendered":"

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There’s no single instruction that can do this. BMI1 blsi dst,src<\/code><\/a> can isolate the lowest<\/em> set bit, not the highest. i.e. x & -x<\/code>. If x86 had a bit-reversed version of blsi<\/code>, we could use that, but it doesn’t.<\/p>\n

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But you can do much better than what you were suggesting<\/strong>. An all-zero input is always going to be a special case for bit-scan and shift. Otherwise our output has exactly 1 bit set. It’s 1 << bsr(input)<\/code>.<\/p>\n

;; input: x in RDI\n;; output: result in RAX\nisolate_msb:\n    xor   eax, eax           ; tmp = 0\n    bsr   rdi, rdi           ; edi = bit index of MSB in input\n    jz    .input_was_zero\n    bts   rax, rdi           ; rax |= 1<<edi\n\n.input_was_zero:             ; return 0 for input=0\n    ret\n<\/code><\/pre>\n
Obviously for 32-bit inputs, use only 32-bit registers.  And if zero is not possible, omit the JZ.  Using BSR instead of LZCNT gives us a bit-index, not 31-bitidx, so we can use it directly.  But LZCNT is significantly faster on AMD.<\/p>\n
The xor-zeroing is off the critical path, to prepare an input for BTS.  xor-zero + BTS is the most efficient way to implement 1<<n<\/code> on Intel CPUs.  It’s 2 uops with 2c latency on AMD, so mov rax,1<\/code> \/ shl rax,cl<\/code> would be better there.  But worse on Intel because variable-count shifts are 3 uops, unless you use BMI2 shlx<\/code>.<\/p>\n
Anyway, the real work here is BSR + BTS, so that’s 3 cycle + 1 cycle latency on Intel SnB-family.  (https:\/\/agner.org\/optimize\/<\/a>)<\/p>\n
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In C \/ C++, you’d write this as<\/h1>\n
unsigned isolate_msb32(unsigned x) {\n    unsigned bitidx = BSR32(x);\n    \/\/return 1ULL << bitidx;           \/\/ if x is definitely non-zero\n    return x ? 1U << bitidx : x;\n}\n\nunsigned isolate_msb64(uint64_t x) {\n    unsigned bitidx = BSR64(x);\n    return x ? 1ULL << bitidx : x;\n}\n<\/code><\/pre>\n
Where BSR32<\/code> is defined in terms of an intrinsic your compiler supports.  This is where things get tricky, especially if you want a 64-bit version.  There’s no single portable intrinsic.  GNU C provides count-leading-zeros intrinsics, but GCC and ICC suck at optimizing 63-__builtin_clzll(x)<\/code> back into just BSR.  Instead they negate twice.  There are<\/em> builtins for BSR specifically, but those are even more compiler-specific than just MSVC vs. compilers that support GNU extensions (gcc\/clang\/ICC).<\/p>\n
#include <stdint.h>\n\n\/\/ define BSR32() and BSR64()\n#if defined(_MSC_VER) || defined(__INTEL_COMPILER)\n    #ifdef __INTEL_COMPILER\n        typedef unsigned int bsr_idx_t;\n    #else\n        #include <intrin.h>   \/\/ MSVC\n        typedef unsigned long bsr_idx_t;\n    #endif\n\n    static inline\n    unsigned BSR32(unsigned long x){\n        bsr_idx_t idx;\n        _BitScanReverse(&idx, x); \/\/ ignore bool retval\n        return idx;\n    }\n    static inline\n    unsigned BSR64(uint64_t x) {\n        bsr_idx_t idx;\n        _BitScanReverse64(&idx, x); \/\/ ignore bool retval\n        return idx;\n    }\n#elif defined(__GNUC__)\n\n  #ifdef __clang__\n    static inline unsigned BSR64(uint64_t x) {\n        return 63-__builtin_clzll(x);\n      \/\/ gcc\/ICC can't optimize this back to just BSR, but clang can and doesn't provide alternate intrinsics\n    }\n  #else\n    #define BSR64 __builtin_ia32_bsrdi\n  #endif\n\n    #include <x86intrin.h>\n    #define BSR32(x) _bit_scan_reverse(x)\n\n#endif\n<\/code><\/pre>\n
On the Godbolt compiler explorer<\/a>, clang and ICC compile this branchlessly, even when they don’t know that x<\/code> is non-zero.<\/p>\n
All 4 compilers fail to use bts<\/code> to implement 1<<bit<\/code>. \ud83d\ude41  It’s very cheap on Intel.<\/p>\n
# clang7.0 -O3 -march=ivybridge   (for x86-64 System V)\n# with -march=haswell and later it uses lzcnt and has to negate.  \/sigh.\nisolate_msb32(unsigned int):\n        bsr     ecx, edi\n        mov     eax, 1\n        shl     rax, cl\n        test    edi, edi\n        cmove   eax, edi       # return 1<<bsr(x)  or  x (0) if x was zero\n        ret\n<\/code><\/pre>\n
GCC and MSVC make branchy code.  e.g.<\/p>\n
# gcc8.2 -O3 -march=haswell\n    mov     eax, edi\n    test    edi, edi\n    je      .L6\n    bsr     eax, edi\n    mov     edi, 1\n    shlx    rax, rdi, rax    # BMI2:  1 uop instead of 3 for shl rax,cl\n.L6:\n    ret\n<\/code><\/pre>\n<\/p><\/div>\n
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solved What is the most efficient way to zero all bits below the most significant set bit? <\/p>\n","protected":false},"excerpt":{"rendered":"
[ad_1] There’s no single instruction that can do this. BMI1 blsi dst,src can isolate the lowest set bit, not the highest. i.e. x & -x. If x86 had a bit-reversed version of blsi, we could use that, but it doesn’t. But you can do much better than what you were suggesting. An all-zero input is … Read more<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[320],"tags":[465,1013,324,325,523],"class_list":["post-20052","post","type-post","status-publish","format-standard","hentry","category-solved","tag-assembly","tag-bit-manipulation","tag-c","tag-performance","tag-x86"],"yoast_head":"\n[Solved] What is the most efficient way to zero all bits below the most significant set bit? - JassWeb<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/jassweb.com\/solved\/solved-what-is-the-most-efficient-way-to-zero-all-bits-below-the-most-significant-set-bit\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"[Solved] What is the most efficient way to zero all bits below the most significant set bit? - JassWeb\" \/>\n<meta property=\"og:description\" content=\"[ad_1] There’s no single instruction that can do this. BMI1 blsi dst,src can isolate the lowest set bit, not the highest. i.e. x & -x. If x86 had a bit-reversed version of blsi, we could use that, but it doesn’t. But you can do much better than what you were suggesting. An all-zero input is ... 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BMI1 blsi dst,src can isolate the lowest set bit, not the highest. i.e. x & -x. If x86 had a bit-reversed version of blsi, we could use that, but it doesn’t. But you can do much better than what you were suggesting. An all-zero input is ... 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